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This paper proposes a power cycling test setup and its control method to simulate a submodule (SM) in a modular multilevel

converter (MMC) to investigate the reliability of the SM. The MMC consists of various components such as capacitors, reactors, and

power semiconductors. Among them, the power semiconductors are one of the reliability-critical components because there are

usually hundreds IGBTs in a MMC. Therefore, the estimation of life-span and condition monitoring of IGBTs are important issues for

the multilevel topologies and they can be studied by the proper power cycling test. In order to fully simulate the operation of

submodules, the analysis of the MMC is presented and the power cycling test bench is introduced in this paper. The proposed power

cycling test bench can control the load current, fundamental frequency, and power factor as well as DC component of the arm

current. The simulation results will be shown to verify the validity and feasibility of the proposed power cycling test bench and its

control scheme.