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[International Conference] Anatolii Tcai and Kyo-Beum Lee, "DC-link Ripple Current Reduction in Back-to-back converters with DPWM," in Proc. IPEC (ECCE-Asia) Conf., May 2018, pp. 4109–4113.

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  • 날짜 2019-06-28 20:25
  • 조회 1,495

The DC-link capacitor is the most vulnerable element of a voltage conversion system. The ripple current, flowing through it, causes

thermal processes, which shorten the lifespan of the component. When a discontinuous pulse width modulation (DPWM) is applied

to a back-to-back converter, the DC-link ripple current increases at the intervals with the different clamping directions of both

converters i.e. the first converter's reference voltage is attached to the positive bus of the DC-link, while the reference voltage of the

second converter is connected to the opposite bus or vice versa. Alternatively, the ripple current is lower when the clamping states

of both inverters are the same. This paper proposes a reduction method of the DC-link capacitor ripple current of the back-to-back

converters using the DPWM, considering all the clamping states. The effectiveness of the proposed method is verified by simulation. 

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