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This paper presents methods for suppressing high-frequency (HF-) zero-sequence circulating current (ZSCC) generated by interleaved pulse width

modulation (PWM) and low-frequency (LF-) ZSCC generated by inconsistent circuit parameters or inconsistent reference signals. In medium/high power applications, three-level neutral-point-clamped (NPC) inverters are used in parallel connection to obtain high power rating. In this parallel operation,

interleaved PWM is used to improve the quality of the output current with a small filter inductor. However, ZSCC increases due to the small filter

inductor. The proposed methods for suppression of HF-ZSCC generated by interleaved PWM are alternative phase opposite disposition (APOD) PWM

based on carrier modulation and double-reference PWM (DRPWM) based on reference signal modulation. Additionally, the method that injects an

optimized zero-sequence voltage (ZSV) when LF-ZSCC is generated is added to suppress HF- and LF- ZSCC simultaneously. The ZSCC suppression

performance is proved by the simulation results.