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[Thesis] Sang-Hyuk Lee, "스위치 제어형 블리드 회로 기반 BMS의 내부저항 진단 기법 ," 아주대학교 공학박사 학위 논문, 2026.

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  • 날짜 2026-04-23 17:40
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This dissertation proposes a real-time battery internal resistance (DCIR) self-diagnosis technique based on a battery management system (BMS) incorporating a switching-controlled bleed circuit. The proposed method significantly expands the functionality of the conventional passive balancing path of the BMS by adding an active switching circuit. This architecture enables stable and reproducible measurement of internal resistance for various battery chemistries, including traditional lead-acid batteries utilized in UPS systems, as well as next-generation lithium-ion (Li-ion) and lithium iron phosphate (LFP) cells. Specifically, it ensures stable pulse current injection and precise voltage drop measurement, even while operating in the challenging UPS DC-Link environment. This configuration allows for the real-time evaluation of battery cell internal resistance.

Conventional ACIR-based methods face structural limitations in real-time internal resistance diagnosis under DC conditions due to voltage response distortion caused by mutual interference with the DC-Link capacitor and inverter control loop in UPS systems. To address this challenge, this study first analyzes the definition of internal resistance, the time-domain DCIR measurement principle, and the voltage distortion factors inherent in DC-Link connected battery systems to identify the limitations of existing techniques. Furthermore, to investigate the critical correlation between battery degradation and DCIR variations, degradation simulations under various temperature conditions are conducted using a Doyle-Fuller-Newman (DFN) model implemented within the PyBaMM framework. The impact of temperature-dependent degradation mechanisms such as Solid Electrolyte Interphase (SEI) growth, lithium plating, and loss of active material (LAM) on DCIR is comparatively analyzed.

The proposed circuit hardware is constructed by incorporating it into an existing balancing board, featuring pulse current waveform design, a high-speed voltage measurement path (Kelvin sensing), and specialized filtering techniques for noise suppression. This establishes a robust hardware environment optimized for DCIR measurement. Based on this setup, DCIR is measured during DC-Link operation under various state-of-charge (SOC) and temperature conditions, and the results are compared with PyBaMM simulation data to analyze degradation trends. Finally, the stability and reproducibility of the proposed method are experimentally verified, demonstrating its effectiveness in high-noise, DC-Link interference environments of UPS systems.

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