PUBLICATIONS

This thesis proposes a neutral-point current reduction method in three-level silicon carbide neutral-point clamped (SiC-NPC) inverters. The SiC-NPC 

inverters have the same configuration as standard NPC inverters and consist only the SiC devices. The neutral-point current is the current flowing 

through the DC-link capacitor in three-level inverters. Thisneutral-point current occurs depend on voltage modulation scheme in three-level inverters 

and this current affects lifetime of the DC-link capacitors. The lifetime of DC-link capacitors is closely related to reliability of inverters because the 

capacitor failure is one of the major causes of equipment failure. To reduce this neutral-point current, the thesis proposes the new voltage modulation scheme based on the partial two-level operation. In the three-level inverters, the neutral-point current occurs when the inverter is operated with three voltage level (positive, neutral and negative), but does not occur when the inverter is operated with two voltage level (positive and negative). 

Therefore, the neutral-point current is reduced by the proper combination of two-level and three-level operations. The proposed method is verified by simulation and experiment.