In this paper, an optimized space-vector modulation (SVM) to reduce DC-link ripple current in three-level inverters is presented.
Various types of capacitors can be utilized to balance the voltage in the DC-link of voltage source inverters. Electrolytic capacitors
are widely used owing to their large capacitance per volume. However, electrolytic capacitors have a short lifespan because the
allowable ripple current is low. A conventional SVM that is focused on improving harmonic characteristics. Therefore, it cannot
balance the DC-link ripple current properly because using some voltage vectors increases the DC-link ripple current. To overcome
this limitation and extend the lifespan of the capacitors, an optimized SVM is proposed to reduce the DC-link ripple current. The
proposed modulation scheme synthesizes the reference voltage by choosing voltage vectors that cause smaller increases in the DC-
link ripple current, avoiding those that cause larger increases. The effectiveness of the proposed optimized SVM is verified by
simulations and experimental results.