Anatolii Tcai, Ibrahim Mohd Alsofyani, and Kyo-Beum Lee, "DC-link Ripple Reduction in a DPWM-based Two-Level VSC," in Proc. ECCE Conf., Sep. 2018, pp. 1483–1487. > Paper

This paper proposes a method to reduce the ripple current of the DC-link capacitor in the two-level voltage source converter (VSC)

with the discontinuous pulse-width modulation (DPWM). The DC-link capacitor is the most vulnerable component of the power

converters. In real applications, the capacitor block is very bulky, as many capacitors are connected in parallel to share the value of

the ripple current. It contributes the most to the volume and weight of the whole system. The DPWM is used to minimize the

number of switching for the power transistors, therefore, reducing the stress and the power loss. This leads to increased efficiency

and reliability of the system. By reducing the DC-link ripple current in DPWM-based systems, the reliability of the system can be

further increased. Therefore, the proposed method introduces a technique to reduce the DC-link ripple current in a DPWM-based

VSC. The efficacy of the proposed method is confirmed by simulation results.