Thesis In Jung Won, “최적화된 스위칭 기법을 적용한 3-레벨 T-type 인버터의 직류단 전류 리플 저감 방법,” 아주대학교 공학석사 학위 논문, 2017.
2017
본문
This paper presents an optimized switching strategy for DC-link capacitor current ripple reduction. The large electrolytic capacitors are
commonly used at the DC-link of power
electronics applications to stabilize the DC-link voltage and supply power for
the inverter. The
most important factor for designing the
DC-link capacitor is allowable current ripple of the capacitor. The DC-link
over-ripple causes a
high heat-loss, shortened lifespan, and
low stability and reliability. Therefore, the large passive components are
typically used to reduce
the current ripple. However, these
passive components lead to a bulky size and slow dynamic response. This paper
proposes a new
switching scheme to reduce the DC-link
capacitor current ripple without any additional hardware or complex
calculations. In addition,
the common mode voltage and leakage
current are decreased by proposed switching method. The efficacy of the
proposed method
is verified using simulations and
experimental results with a three-level T-type inverter.
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