Anatolii Tcai, Ibrahim Mohd Alsofyani, In-Yong Seo, and Kyo-Beum Lee, "DC-link Ripple Reduction in a DPWM-Based Two-Level VSI," Energies, vol. 11, no. 11, pp. 1–16, Nov. 2018. -SCIE > Paper

This paper proposes a new method to reduce the ripple current of the DC-link capacitor in a two-level voltage source inverter (VSI),

with a discontinuous pulse-width modulation (DPWM). In real applications, a capacitor block is very bulky, due to the parallel 

connection of several capacitors that share the value of the ripple current. Hence, it contributes significantly to the volume and weight 

of the whole system. Conventional DPWM is used to minimize the amount of switching for the power transistors, therefore, 

reducing stress and power loss. This leads to increased efficiency and reliability of the system. Nevertheless, the reduction of the DC 

link ripple current is still not optimal. Therefore, the proposed method introduces a PWM phase-shift technique to provide further 

reduction of the DC-link ripple current in a DPWM-based VSI. The efficacy of the proposed method is confirmed by simulation and 

experimental results.